Module Details

Module Code: ELTR8016
Title: Semiconductor IC Design
Long Title: IC Design: Wafer to Package
NFQ Level: Advanced
Valid From: Semester 2 - 2019/20 ( January 2020 )
Duration: 1 Semester
Credits: 5
Field of Study: 5230 - Electronic Engineering
Module Delivered in: 1 programme(s)
Module Description: This module introduces all stages of integrated circuit (IC) design from the initial circuit through simulation to layout. Students will learn how to design an IC to meet given requirements. They will also learn the fundamentals of laying out an IC along with layout techniques to improve matching. An introduction to IC packaging will also be covered.
 
Learning Outcomes
On successful completion of this module the learner will be able to:
# Learning Outcome Description
LO1 Design a semiconductor-based electronic circuit to meet specified requirements.
LO2 Simulate and verify a semiconductor-based electronic circuit.
LO3 Layout a circuit using IC layout software, run Design Rule Check ( DRC ) and Layout Versus Schematic ( LVS ) on the design and simulate the final layout using extracted parameters.
LO4 Outline the steps involved in a typical IC manufacturing process, including the choices to be made in the different package types for ICs - taking into account issues such as cost, reliabilty, speed, etc.
LO5 Discuss proposed developments in the IC manufacturing industry, including any potential impact on society and the environment.
Dependencies
Module Recommendations

This is prior learning (or a practical skill) that is strongly recommended before enrolment in this module. You may enrol in this module if you have not acquired the recommended learning but you will have considerable difficulty in passing (i.e. achieving the learning outcomes of) the module. While the prior learning is expressed as named MTU module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).
Students will have a knowledge of electronic components and circuit theory.
Incompatible Modules
These are modules which have learning outcomes that are too similar to the learning outcomes of this module. You may not earn additional credit for the same learning and therefore you may not enrol in this module if you have successfully completed any modules in the incompatible list.
No incompatible modules listed
Co-requisite Modules
No Co-requisite modules listed
Requirements

This is prior learning (or a practical skill) that is mandatory before enrolment in this module is allowed. You may not enrol on this module if you have not acquired the learning specified in this section.
No requirements listed
 
Indicative Content
Semiconductor circuit design
Analysis, design and simulation of common semiconductor circuits, e.g. current source, differential amplifier, op-amp.
Wafer fabrication process
Description of the steps involved in the wafer fabrication process and the process flow for a typical CMOS process.
IC layout
IC layout steps including Design Rule Check ( DRC ) and Layout Versus Schematic ( LVS ). IC layout techniques for improved matching. IC layout software.
IC packaging.
Parameters and options available in IC packaging.
Module Content & Assessment
Assessment Breakdown%
Coursework50.00%
End of Module Formal Examination50.00%

Assessments

Coursework
Assessment Type Practical/Skills Evaluation % of Total Mark 20
Timing Week 6 Learning Outcomes 1,2
Assessment Description
Students will design a circuit to meet given requirements and will then simulate to verify operation and performance.
Assessment Type Practical/Skills Evaluation % of Total Mark 20
Timing Week 10 Learning Outcomes 1,3
Assessment Description
Students will layout a circuit and use techniques such as Design Rule Check ( DRC ) and Layout Versus Schematic ( LVS ) to verify the layout.
Assessment Type Written Report % of Total Mark 10
Timing Week 10 Learning Outcomes 5
Assessment Description
Work in a group to produce a report that focuses on a specific area of proposed future IC processing techniques. The report will use the IC industry roadmap as a starting point and will cover the potential impact of the change, including any possible impact on the environment and on society in general.
End of Module Formal Examination
Assessment Type Formal Exam % of Total Mark 50
Timing End-of-Semester Learning Outcomes 1,4,5
Assessment Description
End-of-Semester Final Examination
Reassessment Requirement
Repeat examination
Reassessment of this module will consist of a repeat examination. It is possible that there will also be a requirement to be reassessed in a coursework element.

The University reserves the right to alter the nature and timings of assessment

 

Module Workload

Workload: Full Time
Workload Type Contact Type Workload Description Frequency Average Weekly Learner Workload Hours
Lecture Contact Theory and techniques of IC design , layout and packaging. Every Week 2.00 2
Lab Contact Practical application of theory to design and layout of ICs. Every Week 2.00 2
Independent & Directed Learning (Non-contact) Non Contact Revision. Practical processing. Every Week 3.00 3
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 4.00
Workload: Part Time
Workload Type Contact Type Workload Description Frequency Average Weekly Learner Workload Hours
Lecture Contact Theory and problem solving skills. Every Week 1.50 1.5
Lab Contact Practical application of theory. Every Week 1.50 1.5
Independent & Directed Learning (Non-contact) Non Contact Revision. Practical processing. Every Week 4.00 4
Total Hours 7.00
Total Weekly Learner Workload 7.00
Total Weekly Contact Hours 3.00
 
Module Resources
Recommended Book Resources
  • Department of Electronic Engineering.. Lecture notes..
  • Carusone , Johns , Martin. (2012), Analog Integrated Circuit Design, 2nd Edition. [ISBN: 978-047077010].
Supplementary Book Resources
  • Phillip E. Allen and Douglas R. Holberg. (2016), CMOS analog circuit design, 3rd edition. [ISBN: 978-019976507].
This module does not have any article/paper resources
Other Resources
  • Software, IC layout software..
  • Website, IEEE. https://irds.ieee.org/.
 
Module Delivered in
Programme Code Programme Semester Delivery
CR_EELES_8 Bachelor of Engineering (Honours) in Electronic Engineering 8 Mandatory