Module Details
Module Code: |
ELTR8007 |
Title: |
Computer Systems Design
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Long Title:
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Computer Systems Design
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NFQ Level: |
Advanced |
Valid From: |
Semester 2 - 2019/20 ( January 2020 ) |
Field of Study: |
5230 - Electronic Engineering
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Module Description: |
This module will examine and develop an appreciation of the issues that have influenced modern microprocessor-based computer systems and allow the student to critically evaluate and make architectural decisions for modern computing applications.
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Learning Outcomes |
On successful completion of this module the learner will be able to: |
# |
Learning Outcome Description |
LO1 |
describe the factors that influence the performance of microprocessors in typical use-case scenarios |
LO2 |
critically evaluate different architectural approaches within microprocessors and systems design based on their intended end use |
LO3 |
analyse and compare different processors, operating systems and platforms, selecting and presenting appropriate platforms for typical design problems |
LO4 |
analyse and specify memory models as appropriate to modern computer systems |
LO5 |
select and specify algorithms and system architectures to allow for parallel processing applications |
LO6 |
demonstrate an appreciation of the legal and ethical considerations in the industry and choice of computing/processing platforms. |
Dependencies |
Module Recommendations
This is prior learning (or a practical skill) that is strongly recommended before enrolment in this module. You may enrol in this module if you have not acquired the recommended learning but you will have considerable difficulty in passing (i.e. achieving the learning outcomes of) the module. While the prior learning is expressed as named MTU module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).
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Completion of a Level 6/7 module with exposure to micro-processor systems and micro-controller systems |
Incompatible Modules
These are modules which have learning outcomes that are too similar to the learning outcomes of this module. You may not earn additional credit for the same learning and therefore you may not enrol in this module if you have successfully completed any modules in the incompatible list.
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No incompatible modules listed |
Co-requisite Modules
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No Co-requisite modules listed |
Requirements
This is prior learning (or a practical skill) that is mandatory before enrolment in this module is allowed. You may not enrol on this module if you have not acquired the learning specified in this section.
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No requirements listed |
Indicative Content |
CPU/MPU Architectures
History of architectures, CISC, RISC, comparison, architectural decisions, VLIW, future directions
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Development of Architectures
Bottlenecks, hazards and solutions, Harvard architectures, pipelining, parallelism, architectural, control & data hazards, vector processors
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End use of Computer Systems - Architectural Requirements
Microprocessors Vs Microcontrollers, interrupt handling, interrupt vectors, vector maps and OS interaction
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Memory Models
UMA/NUMA memory models, paged memory systems, applications to system architectures and computer management
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Operating System & Virtualisation
Modern OS designs, requirements and implementations. Unix, Windows and Virtual Machines. Comparison and selection for applications
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Parallel/Distributed Architectures
Algorithm partitioning, distribution, machine interconnection networks, message passing systems, MPP systems
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Ethical and legal considerations
Examination of possible industry ethical and legal problems through case study, e.g. redundancy of decision making, hacking/security implications and corporate responsibility
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Module Content & Assessment
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Assessment Breakdown | % |
Coursework | 40.00% |
End of Module Formal Examination | 60.00% |
Assessments
End of Module Formal Examination |
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Reassessment Requirement |
Repeat examination
Reassessment of this module will consist of a repeat examination. It is possible that there will also be a requirement to be reassessed in a coursework element.
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The University reserves the right to alter the nature and timings of assessment
Module Workload
Workload: Full Time |
Workload Type |
Contact Type |
Workload Description |
Frequency |
Average Weekly Learner Workload |
Hours |
Lab |
Contact |
Lecture theory and laboratory exercises session (combined) |
Every Week |
3.00 |
3 |
Independent & Directed Learning (Non-contact) |
Non Contact |
Review of lecture notes, resources, preparation for assessment deliverables |
Every Week |
4.00 |
4 |
Total Hours |
7.00 |
Total Weekly Learner Workload |
7.00 |
Total Weekly Contact Hours |
3.00 |
Workload: Part Time |
Workload Type |
Contact Type |
Workload Description |
Frequency |
Average Weekly Learner Workload |
Hours |
Lab |
Contact |
Lecture theory and laboratory exercises session (combined) |
Every Week |
3.00 |
3 |
Independent & Directed Learning (Non-contact) |
Non Contact |
Review of lecture notes, resources, preparation for assessment deliverables |
Every Week |
4.00 |
4 |
Total Hours |
7.00 |
Total Weekly Learner Workload |
7.00 |
Total Weekly Contact Hours |
3.00 |
Module Resources
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Recommended Book Resources |
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John L. Hennessy, David A. Patterson,. (2018), Computer Architecture: A Quantitative Approach, 6th Edition. Elsevier Technology/Morgan Kaufmann, [ISBN: 978-0123838728].
| Supplementary Book Resources |
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Maurice Herlihy & Nir Shavit. (2012), The Art of Multiprocessor Programming, Morgan Kaufmann, [ISBN: 978-012397337].
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Yan Solihin. (2015), Fundamentals of Parallel Multicore Architecture, Chapman & Hall/CRC Computational Science, [ISBN: 978-148221118].
| Recommended Article/Paper Resources |
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IEEE. (2013), Emily Blem, Jaikrishnan Menon, and
Karthikeyan Sankaralingam, 2013, Power
Struggles: Revisiting the RISC vs. CISC
Debate on Contemporary ARM and x86
Architectures, IEEE International Symposium on High
Performance Computer Architecture (HPCA
2013),
| Other Resources |
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Website, William Gayde. (2020), How CPUs are Designed and Built., USA, Techspot,
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Website, M Lipp, M Schwarz et al.. (2018), Meltdown: Reading Kernel Memory from
User Space, USA, 27th {USENIX} Security Symposium,
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Website, (2020), Computer Organization and Architecture
Tutorials, India, Geeks for Geeks,
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